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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2022-07-22 16:11:55 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-08-16 09:37:02 +0200 |
| commit | ffd882417412ea7273ae14deec77711f6df54bbc (patch) | |
| tree | 9aa4d3af2fe3fb0e4e23eb11e37f04c0775b3365 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 80c4ece67b4050559e4e2417e77bbfd57e8b3899 (diff) | |
arm64: dts: renesas: rzg2l-smarc-som: Add PHY interrupt support for ETH{0/1}
The PHY interrupt (INT_N) pin is connected to IRQ2 and IRQ3 for ETH0
and ETH1 respectively.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220722151155.21100-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions