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authorRodrigo Vivi <rodrigo.vivi@intel.com>2015-04-10 11:15:10 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-04-14 19:15:23 +0200
commitc7240c3bc5d6610b42dbb10fda71bbbf1dad5515 (patch)
tree7d711d513eeb51d484baaeb2fab266f36a0fe507 /tools/perf/scripts/python/export-to-postgresql.py
parent89251b177b588adf5e62df42d51017d24047f44b (diff)
drm/i915: PSR VLV: Add single frame update.
According to spec: "In PSR HW or SW mode, SW set this bit before writing registers for a flip. It will be self-clear when it gets to the PSR active state." Some versions of spec mention that this is needed when in "Persistent mode" but define it as same as "SW mode". Since this fix the page flip case let's assume this is exactly what we need. Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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