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author | Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> | 2018-11-14 20:17:01 +0530 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-02-01 18:12:55 -0600 |
commit | b4f6dcb9d35688392d668c46e834f72c55900b49 (patch) | |
tree | d113138b2c518059a07e79d1af7ac8674895056e /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 807ffb1e1eabbcdcd46494ee415317aa80ed415c (diff) |
PCI: Enable SERR# forwarding for all bridges
As per Figure 6-3 in PCIe r4.0, sec 6.2.6, ERR_ messages will be forwarded
from the secondary interface to the primary interface, if the SERR# Enable
bit in the Bridge Control register is set.
It seems clear that an ACPI hotplug parameter method (_HPP or _HPX) that
tells us to "enable SERR in the command register" (ACPI v6.2, sec 6.2.8,
6.2.9.1) refers to PCI_COMMAND_SERR, which enables reporting of errors by
the function itself.
For bridges, we also interpreted that to mean we should enable
PCI_BRIDGE_CTL_SERR, which enables *forwarding* of errors by the bridge.
But we didn't enable PCI_BRIDGE_CTL_SERR anywhere else, which means we
never enabled it for non-ACPI systems or ACPI systems that didn't supply
hotplug parameters.
That means errors reported below bridges were often never forwarded up to a
Root Port where they could be signaled via AER.
Enable PCI_BRIDGE_CTL_SERR for all bridges so we can get better error
reporting for downstream devices.
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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