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author | Alex Dai <yu.dai@intel.com> | 2015-09-25 11:46:56 -0700 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-09-30 17:15:12 +0200 |
commit | 93f253187c2f565678bd7e5ca5f64c1043774f1b (patch) | |
tree | 94f192d9534985030b65c03a96c781efbb5c243b /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 36c0d0cf33ed31fada15caac34d50555b33208bb (diff) |
drm/i915/guc: Media domain bit needed when notify GuC rc6 state
GuC expects two bits for Render and Media domain separately when
driver sends data via host2guc SAMPLE_FORCEWAKE. Bit 0 is for
Render and bit 1 is for Media domain.
v2: Keep sync with code for WaRsDoubleRc6WrlWithCoarsePowerGating
v1: Add parameters definition to avoid magic value
Signed-off-by: Alex Dai <yu.dai@intel.com>
Reviewed-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions