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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-06-25 22:01:47 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-07-10 22:04:37 +0200 |
| commit | 7ca1ac135bc4d566e460230133ff959bb1bfcf88 (patch) | |
| tree | 12de4a2d85e099eda0b466a95dc8fae7ea034296 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 8cc3e169a606ab9577a333a2017cb1acf75668e3 (diff) | |
drm/i915: Remove spll_refcount for hsw
SPLL would be a reference clock we could potentially share,
especially if we want to use the SSC mode. But currently we
don't, so let's rip out this complexity for a simpler conversion
to the new display pll framework.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions