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authorMatt Redfearn <matt.redfearn@imgtec.com>2016-09-07 10:45:18 +0100
committerRalf Baechle <ralf@linux-mips.org>2016-10-04 16:13:57 +0200
commit77451997237fa7e8ba4f5e2f0fcd99898f78ff9b (patch)
treed4419fd748abf7e2a66cdc4c9c74730ef536440e /tools/perf/scripts/python/export-to-postgresql.py
parent929d4f51e6b87900c9179eb62d6b43db6ce4930d (diff)
MIPS: pm-cps: Support CM3 changes to Coherence Enable Register
MIPS CM3 changed the management of coherence. Instead of a coherence control register with a bitmask of coherent domains, CM3 simply has a coherence enable register with a single bit to enable coherence of the local core. Support this by clearing and setting this single bit to disable / enable coherence. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: Adam Buchbinder <adam.buchbinder@gmail.com> Cc: Tony Wu <tung7970@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Nikolay Martynov <mar.kolya@gmail.com> Cc: Kees Cook <keescook@chromium.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14226/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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