diff options
| author | Wesley Chalmers <Wesley.Chalmers@amd.com> | 2021-03-12 21:47:13 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-04-09 16:48:53 -0400 |
| commit | 482812d56698efeeb5f5760482c27006e3088985 (patch) | |
| tree | e39be55d43060cacb11734a2117a41a3d4c7bb44 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | b126a69906ed6ef6ee45aa9790cd03ba002c217e (diff) | |
drm/amd/display: Set max TTU on DPG enable
[WHY]
There is a bug in HW that causes P-State to hang when DPG is enabled in
certain conditions.
[HOW]
The solution is to force MIN_TTU_VBLANK register to maximum value
whenever DPG has been enabled.
Make stream do a full update on test pattern change, so that the TTUs
get updated.
When DPG is enabled, update the ttu_regs.min_ttu_vblank field of each
pipe in the stream's topology to the maximum value (0xffffff).
v2: squash in build fix for when DCN is not defined (Alex)
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions