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authorTomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>2022-08-31 11:26:51 +0300
committerRobert Foss <robert.foss@linaro.org>2022-09-02 18:17:57 +0200
commit3fc307dcec8b9aeecae8c1bf2c97f770805daf4e (patch)
tree356db5215a4075b899ba11d1595858f8c118a14f /tools/perf/scripts/python/export-to-postgresql.py
parente06a46087d8bbde7ca31361789edfe026b08fdce (diff)
drm/bridge: ti-sn65dsi86: Reject modes with too large blanking
The front and back porch registers are 8 bits, and pulse width registers are 15 bits, so reject any modes with larger periods. Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com> Reviewed-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20220831082653.20449-2-tomi.valkeinen@ideasonboard.com
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