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author | José Roberto de Souza <jose.souza@intel.com> | 2021-06-25 16:55:59 -0700 |
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committer | José Roberto de Souza <jose.souza@intel.com> | 2021-07-20 16:15:26 -0700 |
commit | 36203e4fb4cb7d65dc471493caf132ebd8d263bb (patch) | |
tree | d45a06589b74a628223fa30ac8c362a69598b379 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | dc22aa130565acc4952a13378c782a95cf82b193 (diff) |
drm/i915/display/adl_p: Implement PSR changes
Implements changes around PSR for alderlake-P:
- EDP_SU_TRACK_ENABLE was removed and bit 30 now has other function
- Some bits of PSR2_MAN_TRK_CTL moved and SF_PARTIAL_FRAME_UPDATE was
removed setting SU_REGION_START/END_ADDR will do this job
- SU_REGION_START/END_ADDR have now line granularity but will need to
be aligned with DSC when the PSRS + DSC support lands
BSpec: 50422
BSpec: 50424
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210625235600.765677-1-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions