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| author | Hans de Goede <hdegoede@redhat.com> | 2017-02-28 11:26:21 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2017-02-28 12:47:04 +0200 |
| commit | 1e08a260b178a6cb5547a28153f88661970474e5 (patch) | |
| tree | e2b72900285c24d44e3d8e1e20b5741cc2ed5fd9 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 18a00095a5f3b73cabab513119db9275afb62321 (diff) | |
drm/i915/dsi: VLV/CHT Only wait for LP00 on MIPI PORT A
On some devices only MIPI PORT C is used, in this case checking the
MIPI PORT A CTRL AFE_LATCHOUT bit (there is no such bit for PORT C
on VLV/CHT) will result in false positive "DSI LP not going Low" errors
as this checks the PORT A clk status.
In case both ports are used we have already checked the AFE_LATCHOUT
bit when going through the for_each_dsi_port() loop for PORT A and
checking the same bit again for PORT C is a no-op.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97061
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/242e4438bf29ebffc66eaa182f22b9d60d304bc2.1488273823.git.jani.nikula@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions