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authorManasi Navare <manasi.d.navare@intel.com>2018-11-27 13:41:05 -0800
committerManasi Navare <manasi.d.navare@intel.com>2018-11-27 15:54:14 -0800
commit19fd5adbb595f022c8f3a05133a673143c79fa91 (patch)
tree23edc47882ac2dec7a9a35c6f35900d56d1974db /tools/perf/scripts/python/export-to-postgresql.py
parent7c247c067590b102ed2bd119bcadf4986ca10e94 (diff)
drm/dsc: Define VESA Display Stream Compression Capabilities
This defines all the DSC parameters as per the VESA DSC spec that will be required for DSC encoder/decoder v6: (From Manasi) * Add a bit mask for RANGE_BPG_OFFSET for 6 bits(Manasi) v5 (From Manasi) * Add the RC constants as per the spec v4 (From Manasi) * Add the DSC_MUX_WORD_SIZE constants (Manasi) v3 (From Manasi) * Remove the duplicate define (Suggested By:Harry Wentland) v2: Define this struct in DRM (From Manasi) * Changed the data types to u8/u16 instead of unsigned longs (Manasi) * Remove driver specific fields (Manasi) * Move this struct definition to DRM (Manasi) * Define DSC 1.2 parameters (Manasi) * Use DSC_NUM_BUF_RANGES (Manasi) * Call it drm_dsc_config (Manasi) Cc: dri-devel@lists.freedesktop.org Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> Co-developed-by: Gaurav K Singh <gaurav.k.singh@intel.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through drm-intel) Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-3-manasi.d.navare@intel.com
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