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| author | Moudy Ho <moudy.ho@mediatek.com> | 2023-02-06 17:11:06 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2023-03-06 14:34:35 +0100 |
| commit | 018f1d4fa457af98c9618c0bd17a427745f872fa (patch) | |
| tree | 0e81630282c8f93bce296a3f61505a36985b5a4b /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 981f808e641c624fdf4ece806b599ae66e875ee4 (diff) | |
arm64: dts: mediatek: mt8195: add MUTEX configuration for VPPSYS
In MT8195, the MMSYS has two Video Processor Pipepline Subsystems
named VPPSYS0 and VPPSYS1, each with specific MUTEX to control
Start of Frame(SOF) and End of Frame (EOF) signals.
Before working with them, the addresses, interrupts, clocks and power
domains need to be set up in dts.
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230206091109.1324-4-moudy.ho@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions