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authorImre Deak <imre.deak@intel.com>2016-04-01 16:02:42 +0300
committerImre Deak <imre.deak@intel.com>2016-04-15 14:48:18 +0300
commitd7d7c9ee699a0b85de0023433cdbd8f965e1ac08 (patch)
tree30dc18dd7adb6bd3bfd73826481fdad6cf844bba /tools/perf/scripts/python/call-graph-from-postgresql.py
parentd7d33fd85a6574ddce4cc0340f1856434b6a38ec (diff)
drm/i915/bxt: Don't toggle power well 1 on-demand
Power well 1 is managed by the DMC firmware so don't toggle it on-demand from the driver. This means we need to follow the BSpec display initialization sequence during driver loading and resuming (both system and runtime) and enable power well 1 only once there. Afterwards DMC will toggle power well 1 whenever entering/exiting DC5. For this to work we also need to do away getting the PLL power domain, since that just kept runtime PM disabled for good. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1459515767-29228-12-git-send-email-imre.deak@intel.com
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