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authorChen-Yu Tsai <wens@csie.org>2025-09-12 01:47:10 +0800
committerChen-Yu Tsai <wens@csie.org>2025-09-13 13:57:12 +0800
commita1845487afd06899502714a3500b60f815d98203 (patch)
tree9b5e2342d545bf16b4677f4afccd04fe7b5ef399 /rust/helpers/signal.c
parentedd63e54e516b54c0b7071463d6e839445efab68 (diff)
arm64: dts: allwinner: a523: Add NPU device node
The Allwinner T527 SoC has an NPU built in. Based on identifiers found in the BSP, it is a Vivante IP block. After enabling it, the etnaviv driver reports it as a GC9000 revision 9003. The standard bindings are used as everything matches directly. There is no option for DVFS at the moment. That might require some more work, perhaps on the efuse side to map speed bins. It is unclear whether the NPU block is fused out at the hardware level or the BSP limits use of the NPU through software, as the author only has boards with the T527. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://patch.msgid.link/20250911174710.3149589-8-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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