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authorAnand Moon <linux.amoon@gmail.com>2025-08-25 12:21:50 +0530
committerNeil Armstrong <neil.armstrong@linaro.org>2025-09-04 15:10:15 +0200
commite7f85e6c155aed3e10e698dd05bd04b2d52edb59 (patch)
tree43d5fc03f1b3aeb6ac37c4bc88550e06a0f20910 /rust/helpers/rcu.c
parent494c362fa1633bba127045ace8f0eea0b277af28 (diff)
arm64: dts: amlogic: Add cache information to the Amlogic S922X SoC
As per S922X datasheet add missing cache information to the Amlogic S922X SoC. - Each Cortex-A53 core has 32 KB of instruction cache and 32 KB of L1 data cache available. - Each Cortex-A73 core has 64 KB of L1 instruction cache and 64 KB of L1 data cache available. - The little (A53) cluster has 256 KB of unified L2 cache available. - The big (A73) cluster has 1 MB of unified L2 cache available. Cache memory significantly reduces the time it takes for the CPU to access data and instructions, leading to faster program execution and overall system responsiveness. Signed-off-by: Anand Moon <linux.amoon@gmail.com> Link: https://lore.kernel.org/r/20250825065240.22577-11-linux.amoon@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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