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author | Jarkko Nikula <jarkko.nikula@linux.intel.com> | 2025-08-22 13:56:28 +0300 |
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committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2025-09-16 17:06:42 +0200 |
commit | 1c46bfc4f75e7d43261af65b64e7d3dc4a30daa9 (patch) | |
tree | e93d0fd0ffb31ffb0f1795ab6ad26d2a5ce49bf0 /rust/helpers/irq.c | |
parent | f8d9e56aeb87ce82ce8636cd176cc59b69aa0e41 (diff) |
i3c: mipi-i3c-hci: Use core helpers for DMA mapping and bounce buffering
So far only I3C private and I2C transfers have required a bounce buffer
for DMA transfers when buffer is not DMA'able.
It was observed that when the device DMA is IOMMU mapped and the receive
length is not a multiple of DWORDs (32-bit), the last DWORD is padded
with stale data from the RX FIFO, corrupting 1-3 bytes beyond the
expected data.
A similar issue, though less severe, occurs when an I3C target returns
less data than requested. In this case, the padding does not exceed the
requested number of bytes, assuming the device DMA is not IOMMU mapped.
Therefore, all I3C private transfer, CCC command payload and I2C
transfer receive buffers must be properly sized for the DMA being IOMMU
mapped. Even if those buffers are already DMA safe, their size may not
be DWORD aligned.
To prepare for the device DMA being IOMMU mapped and to address the
above issue, use helpers from I3C core for DMA mapping and bounce
buffering for all DMA transfers.
For now, require bounce buffer only when the buffer is in the
vmalloc() area to avoid unnecessary copying with CCC commands and
DMA-safe I2C transfers.
Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20250822105630.2820009-3-jarkko.nikula@linux.intel.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'rust/helpers/irq.c')
0 files changed, 0 insertions, 0 deletions