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authorPaolo Abeni <pabeni@redhat.com>2025-03-11 10:21:41 +0100
committerPaolo Abeni <pabeni@redhat.com>2025-03-11 10:22:50 +0100
commit40587f749df216889163dd6e02d88ad53e759e66 (patch)
tree2fb05230ac0db5e5d7e6630215b943a187bff5a2 /net/lapb/lapb_timer.c
parent71ca3561c268a07888ba9ce089ab8c3f54710cd4 (diff)
parentdf9fd2a3ce01ea08e4e14e3d9e9d3c113eaeba91 (diff)
Merge branch 'enic-enable-32-64-byte-cqes-and-get-max-rx-tx-ring-size-from-hw'
Satish Kharat via says: ==================== enic: enable 32, 64 byte cqes and get max rx/tx ring size from hw This series enables using the max rx and tx ring sizes read from hw. For newer hw that can be up to 16k entries. This requires bigger completion entries for rx queues. This series enables the use of the 32 and 64 byte completion queues entries for enic rx queues on supported hw versions. This is in addition to the exiting (default) 16 byte rx cqes. Signed-off-by: Satish Kharat <satishkh@cisco.com> ==================== Link: https://patch.msgid.link/20250304-enic_cleanup_and_ext_cq-v2-0-85804263dad8@cisco.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'net/lapb/lapb_timer.c')
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