diff options
| author | Karol Kolacinski <karol.kolacinski@intel.com> | 2025-06-23 17:30:01 -0700 |
|---|---|---|
| committer | Tony Nguyen <anthony.l.nguyen@intel.com> | 2025-06-26 08:37:00 -0700 |
| commit | df3f3c5645bec3c7e2595acbf37db34c0a7de58a (patch) | |
| tree | 6fcc657305a02c9de1ea694806b2b22b84fd845b /net/lapb/lapb_in.c | |
| parent | 5755b4c023dbfc0856087f005ddf437f341c3c45 (diff) | |
ice: wait before enabling TSPLL
To ensure proper operation, wait for 10 to 20 microseconds before
enabling TSPLL.
Adjust wait time after enabling TSPLL from 1-5 ms to 1-2 ms.
Those values are empirical and tested on multiple HW configurations.
Reviewed-by: Milena Olech <milena.olech@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'net/lapb/lapb_in.c')
0 files changed, 0 insertions, 0 deletions