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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 14:48:43 -0700 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-10 14:48:43 -0700 |
commit | 0f166396e7e8931bb4acfd1a6ea1bd4f0b43f1dd (patch) | |
tree | 6279fa70695a4c56b7e935018a4c0fc1dfa82e68 /include/asm-mips/processor.h | |
parent | 5f60cfd932b42c69ed3226400cb5eab152576c3a (diff) | |
parent | 105b1bca4d7bed85bb296f7e7caec2fc643e9fbf (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
[MIPS] PNX8550: Cleanup proc code.
[MIPS] WRPPMC: Fix build.
[MIPS] Yosemite: Fix modpost warnings.
[MIPS] Change names of local variables to silence sparse
[MIPS] SB1: Fix modpost warning.
[MIPS] PNX: Fix modpost warnings.
[MIPS] Alchemy: Fix modpost warnings.
[MIPS] Non-FPAFF: Fix warning.
[MIPS] DEC: Fix modpost warning.
[MIPS] MIPSsim: Enable MIPSsim virtual network driver.
[MIPS] Delete Ocelot 3 support.
[MIPS] remove LASAT Networks platforms support
[MIPS] Early check for SMTC kernel on non-MT processor
[MIPS] Add debugfs files to show fpuemu statistics
[MIPS] Add some debugfs files to debug unaligned accesses
[MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
[MIPS] tc35815: Load MAC address via platform_device
[MIPS] Move FPU affinity code into separate file.
[MIPS] Make ioremap() work on TX39/49 special unmapped segment
[MIPS] rbtx4938: Update and minimize defconfig
...
Diffstat (limited to 'include/asm-mips/processor.h')
-rw-r--r-- | include/asm-mips/processor.h | 92 |
1 files changed, 54 insertions, 38 deletions
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h index 5f80ba71ab92b..1d8b9a8ae324d 100644 --- a/include/asm-mips/processor.h +++ b/include/asm-mips/processor.h @@ -82,10 +82,6 @@ struct mips_fpu_struct { unsigned int fcr31; }; -#define INIT_FPU { \ - {0,} \ -} - #define NUM_DSP_REGS 6 typedef __u32 dspreg_t; @@ -95,8 +91,6 @@ struct mips_dsp_state { unsigned int dspcontrol; }; -#define INIT_DSP {{0,},} - #define INIT_CPUMASK { \ {0,} \ } @@ -155,41 +149,63 @@ struct thread_struct { #define MF_N64 0 #ifdef CONFIG_MIPS_MT_FPAFF -#define FPAFF_INIT 0, INIT_CPUMASK, +#define FPAFF_INIT \ + .emulated_fp = 0, \ + .user_cpus_allowed = INIT_CPUMASK, #else #define FPAFF_INIT #endif /* CONFIG_MIPS_MT_FPAFF */ -#define INIT_THREAD { \ - /* \ - * saved main processor registers \ - */ \ - 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, \ - /* \ - * saved cp0 stuff \ - */ \ - 0, \ - /* \ - * saved fpu/fpu emulator stuff \ - */ \ - INIT_FPU, \ - /* \ - * fpu affinity state (null if not FPAFF) \ - */ \ - FPAFF_INIT \ - /* \ - * saved dsp/dsp emulator stuff \ - */ \ - INIT_DSP, \ - /* \ - * Other stuff associated with the process \ - */ \ - 0, 0, 0, 0, \ - /* \ - * For now the default is to fix address errors \ - */ \ - MF_FIXADE, 0, 0 \ +#define INIT_THREAD { \ + /* \ + * Saved main processor registers \ + */ \ + .reg16 = 0, \ + .reg17 = 0, \ + .reg18 = 0, \ + .reg19 = 0, \ + .reg20 = 0, \ + .reg21 = 0, \ + .reg22 = 0, \ + .reg23 = 0, \ + .reg29 = 0, \ + .reg30 = 0, \ + .reg31 = 0, \ + /* \ + * Saved cp0 stuff \ + */ \ + .cp0_status = 0, \ + /* \ + * Saved FPU/FPU emulator stuff \ + */ \ + .fpu = { \ + .fpr = {0,}, \ + .fcr31 = 0, \ + }, \ + /* \ + * FPU affinity state (null if not FPAFF) \ + */ \ + FPAFF_INIT \ + /* \ + * Saved DSP stuff \ + */ \ + .dsp = { \ + .dspr = {0, }, \ + .dspcontrol = 0, \ + }, \ + /* \ + * Other stuff associated with the process \ + */ \ + .cp0_badvaddr = 0, \ + .cp0_baduaddr = 0, \ + .error_code = 0, \ + .trap_no = 0, \ + /* \ + * For now the default is to fix address errors \ + */ \ + .mflags = MF_FIXADE, \ + .irix_trampoline = 0, \ + .irix_oldctx = 0, \ } struct task_struct; @@ -237,7 +253,7 @@ unsigned long get_wchan(struct task_struct *p); #define ARCH_HAS_PREFETCH -extern inline void prefetch(const void *addr) +static inline void prefetch(const void *addr) { __asm__ __volatile__( " .set mips4 \n" |