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author | Bryan Brattlof <bb@ti.com> | 2025-09-08 14:15:28 -0500 |
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committer | Nishanth Menon <nm@ti.com> | 2025-09-12 09:42:44 +0530 |
commit | 037e496038f6e4cfb3642a0ffc2db19838d564dd (patch) | |
tree | b083c903cf9f8a46e048464d9a11370ac36a500c /fs/xfs/xfs_error.c | |
parent | 0fdd3240fe5a9bf4785e40506bf86b7e16546b83 (diff) |
soc: ti: k3-socinfo: Add information for AM62L SR1.1
The second silicon revision for the AM62L was mainly a ROM revision
and therefore this silicon revision is labeled SR1.1
Add a new decode array to properly identify this revision as SR1.1
Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://patch.msgid.link/20250908-62l-chipid-v1-1-9c7194148140@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'fs/xfs/xfs_error.c')
0 files changed, 0 insertions, 0 deletions