diff options
| author | Wesley Chalmers <Wesley.Chalmers@amd.com> | 2021-01-29 12:37:37 -0500 | 
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-02-09 15:48:18 -0500 | 
| commit | 91a51fbf24e2d9e996987c7fadf666152a9f536a (patch) | |
| tree | d34d495e1c7f4ec0a8b8e1945cf73ae554c69f82 /drivers | |
| parent | 148816f93fa0db19029dc91e09ad7842251fc720 (diff) | |
drm/amd/display: DIO Supported for virtual displays
[WHY]
Virtual displays do not use the backend of the pipe, and so have
infinite backend bandwidth.
[HOW]
Add a skip_dio_check bool to the VBA struct, which is used to override
the DIOSupport calculations.
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Acked-by: Chris Park <Chris.Park@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
8 files changed, 19 insertions, 10 deletions
| diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index 6505373483bb..a0a4ab47a1c0 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -2097,6 +2097,7 @@ int dcn20_populate_dml_pipes_from_context(  			pipes[pipe_cnt].pipe.dest.pixel_rate_mhz *= 2;  		pipes[pipe_cnt].pipe.dest.otg_inst = res_ctx->pipe_ctx[i].stream_res.tg->inst;  		pipes[pipe_cnt].dout.dp_lanes = 4; +		pipes[pipe_cnt].dout.is_virtual = 0;  		pipes[pipe_cnt].pipe.dest.vtotal_min = res_ctx->pipe_ctx[i].stream->adjust.v_total_min;  		pipes[pipe_cnt].pipe.dest.vtotal_max = res_ctx->pipe_ctx[i].stream->adjust.v_total_max;  		switch (get_num_odm_splits(&res_ctx->pipe_ctx[i])) { @@ -2150,6 +2151,7 @@ int dcn20_populate_dml_pipes_from_context(  			break;  		default:  			/* In case there is no signal, set dp with 4 lanes to allow max config */ +			pipes[pipe_cnt].dout.is_virtual = 1;  			pipes[pipe_cnt].dout.output_type = dm_dp;  			pipes[pipe_cnt].dout.dp_lanes = 4;  		} diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c index f33e3de08176..0f3f510fd83b 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c @@ -4168,10 +4168,11 @@ void dml20_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l  	for (i = 0; i <= mode_lib->vba.soc.num_states; i++) {  		locals->DIOSupport[i] = true;  		for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { -			if (locals->OutputBppPerState[i][k] == BPP_INVALID -					|| (mode_lib->vba.OutputFormat[k] == dm_420 +			if (!mode_lib->vba.skip_dio_check[k] +					&& (locals->OutputBppPerState[i][k] == BPP_INVALID +						|| (mode_lib->vba.OutputFormat[k] == dm_420  							&& mode_lib->vba.Interlace[k] == true -							&& mode_lib->vba.ProgressiveToInterlaceUnitInOPP == true)) { +							&& mode_lib->vba.ProgressiveToInterlaceUnitInOPP == true))) {  				locals->DIOSupport[i] = false;  			}  		} diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c index 47e8e71113ee..210c96cd5b03 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c @@ -4289,10 +4289,11 @@ void dml20v2_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode  	for (i = 0; i <= mode_lib->vba.soc.num_states; i++) {  		locals->DIOSupport[i] = true;  		for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { -			if (locals->OutputBppPerState[i][k] == BPP_INVALID -					|| (mode_lib->vba.OutputFormat[k] == dm_420 +			if (!mode_lib->vba.skip_dio_check[k] +					&& (locals->OutputBppPerState[i][k] == BPP_INVALID +						|| (mode_lib->vba.OutputFormat[k] == dm_420  							&& mode_lib->vba.Interlace[k] == true -							&& mode_lib->vba.ProgressiveToInterlaceUnitInOPP == true)) { +							&& mode_lib->vba.ProgressiveToInterlaceUnitInOPP == true))) {  				locals->DIOSupport[i] = false;  			}  		} diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c index 0bcec113ecac..398210d1af34 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c @@ -4257,10 +4257,11 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l  	for (i = 0; i <= mode_lib->vba.soc.num_states; i++) {  		locals->DIOSupport[i] = true;  		for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { -			if (locals->OutputBppPerState[i][k] == BPP_INVALID -					|| (mode_lib->vba.OutputFormat[k] == dm_420 +			if (!mode_lib->vba.skip_dio_check[k] +					&& (locals->OutputBppPerState[i][k] == BPP_INVALID +						|| (mode_lib->vba.OutputFormat[k] == dm_420  							&& mode_lib->vba.Interlace[k] == true -							&& mode_lib->vba.ProgressiveToInterlaceUnitInOPP == true)) { +							&& mode_lib->vba.ProgressiveToInterlaceUnitInOPP == true))) {  				locals->DIOSupport[i] = false;  			}  		} diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c index 8fdb34aa70ff..bc07082c1357 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c @@ -4263,7 +4263,7 @@ void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l  	for (i = 0; i < v->soc.num_states; i++) {  		v->DIOSupport[i] = true;  		for (k = 0; k <= v->NumberOfActivePlanes - 1; k++) { -			if (v->BlendingAndTiming[k] == k && (v->Output[k] == dm_dp || v->Output[k] == dm_edp || v->Output[k] == dm_hdmi) +			if (!v->skip_dio_check[k] && v->BlendingAndTiming[k] == k && (v->Output[k] == dm_dp || v->Output[k] == dm_edp || v->Output[k] == dm_hdmi)  					&& (v->OutputBppPerState[i][k] == 0  							|| (v->OutputFormat[k] == dm_420 && v->Interlace[k] == true && v->ProgressiveToInterlaceUnitInOPP == true))) {  				v->DIOSupport[i] = false; diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h index dd0c3b1780d7..0c5128187e08 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h @@ -297,6 +297,7 @@ struct _vcs_dpi_display_output_params_st {  	int num_active_wb;  	int output_bpc;  	int output_type; +	int is_virtual;  	int output_format;  	int dsc_slices;  	int max_audio_sample_rate; diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c index c9fbb33f05a3..bc0485a59018 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c @@ -451,6 +451,8 @@ static void fetch_pipe_params(struct display_mode_lib *mode_lib)  				dout->output_bpp;  		mode_lib->vba.Output[mode_lib->vba.NumberOfActivePlanes] =  				(enum output_encoder_class) (dout->output_type); +		mode_lib->vba.skip_dio_check[mode_lib->vba.NumberOfActivePlanes] = +				dout->is_virtual;  		if (!dout->dsc_enable)  			mode_lib->vba.ForcedOutputLinkBPP[mode_lib->vba.NumberOfActivePlanes] = dout->output_bpp; diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h index 3529fedc4c52..025aa5bd8ea0 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h @@ -340,6 +340,7 @@ struct vba_vars_st {  	unsigned int DSCInputBitPerComponent[DC__NUM_DPP__MAX];  	enum output_format_class OutputFormat[DC__NUM_DPP__MAX];  	enum output_encoder_class Output[DC__NUM_DPP__MAX]; +	bool skip_dio_check[DC__NUM_DPP__MAX];  	unsigned int BlendingAndTiming[DC__NUM_DPP__MAX];  	bool SynchronizedVBlank;  	unsigned int NumberOfCursors[DC__NUM_DPP__MAX]; | 
