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authorFabrice Gasnier <fabrice.gasnier@foss.st.com>2022-11-23 14:36:52 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-03-11 16:31:56 +0100
commitba68430fab7213fb728ffc32b027841de783479f (patch)
tree18463027f4a3284f10fa9b50a96b20acdfdae24f /drivers/pwm/pwm-stm32-lp.c
parentf57fb23fcc51de51476217339627ec0fd5cb02bd (diff)
pwm: stm32-lp: fix the check on arr and cmp registers update
[ Upstream commit 3066bc2d58be31275afb51a589668f265e419c37 ] The ARR (auto reload register) and CMP (compare) registers are successively written. The status bits to check the update of these registers are polled together with regmap_read_poll_timeout(). The condition to end the loop may become true, even if one of the register isn't correctly updated. So ensure both status bits are set before clearing them. Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/pwm/pwm-stm32-lp.c')
-rw-r--r--drivers/pwm/pwm-stm32-lp.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index e92a140074221..7c8c2bb8f6a28 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -126,7 +126,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
/* ensure CMP & ARR registers are properly written */
ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val,
- (val & STM32_LPTIM_CMPOK_ARROK),
+ (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK,
100, 1000);
if (ret) {
dev_err(priv->chip.dev, "ARR/CMP registers write issue\n");