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| author | Jiri Kosina <jkosina@suse.cz> | 2022-01-10 09:49:13 +0100 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2022-01-10 09:49:13 +0100 |
| commit | 8a2094d679d921d104d3296528d4fa419702ce1c (patch) | |
| tree | 5feeb2f8b94eb3632109b778276ccd1007486770 /drivers/pci/controller/pci-xgene.c | |
| parent | 3809fe479861194e310c23ed48b010c7c0f72d22 (diff) | |
| parent | b60d3c803d7603432a08aeaf988aff53b3a5ec64 (diff) | |
Merge branch 'for-5.17/core' into for-linus
- support for USI style pens (Tero Kristo, Mika Westerberg)
- quirk for devices that need inverted X/Y axes (Alistair Francis)
- small core code cleanups and deduplication (Benjamin Tissoires)
Diffstat (limited to 'drivers/pci/controller/pci-xgene.c')
| -rw-r--r-- | drivers/pci/controller/pci-xgene.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c index e64536047b65..56d0d50338c8 100644 --- a/drivers/pci/controller/pci-xgene.c +++ b/drivers/pci/controller/pci-xgene.c @@ -48,7 +48,6 @@ #define EN_COHERENCY 0xF0000000 #define EN_REG 0x00000001 #define OB_LO_IO 0x00000002 -#define XGENE_PCIE_VENDORID 0x10E8 #define XGENE_PCIE_DEVICEID 0xE004 #define SZ_1T (SZ_1G*1024ULL) #define PIPE_PHY_RATE_RD(src) ((0xc000 & (u32)(src)) >> 0xe) @@ -560,7 +559,7 @@ static int xgene_pcie_setup(struct xgene_pcie_port *port) xgene_pcie_clear_config(port); /* setup the vendor and device IDs correctly */ - val = (XGENE_PCIE_DEVICEID << 16) | XGENE_PCIE_VENDORID; + val = (XGENE_PCIE_DEVICEID << 16) | PCI_VENDOR_ID_AMCC; xgene_pcie_writel(port, BRIDGE_CFG_0, val); ret = xgene_pcie_map_ranges(port); |