summaryrefslogtreecommitdiff
path: root/drivers/pci/controller/pci-tegra.c
diff options
context:
space:
mode:
authorBjorn Helgaas <bhelgaas@google.com>2022-10-05 17:32:57 -0500
committerBjorn Helgaas <bhelgaas@google.com>2022-10-05 17:32:57 -0500
commit14868d783c16b2f7cd46ca1f7fe23b84cdae911d (patch)
treecdc7d8825913eb86422aa5aa4cdaa09ba9bea11e /drivers/pci/controller/pci-tegra.c
parente302bafff6fa5192c8d7afe8387d7fd2a45ce799 (diff)
parent8bb7ff12a91429eb76e093b517ae810b146448fe (diff)
Merge branch 'remotes/lorenzo/pci/misc'
- Add macros for PCI Configuration Mechanism #1 and use them in the ftpci100, mt7621, and tegra drivers (Pali Rohár) * remotes/lorenzo/pci/misc: PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro PCI: mt7621: Use PCI_CONF1_EXT_ADDRESS() macro PCI: ftpci100: Use PCI_CONF1_ADDRESS() macro PCI: Add standard PCI Config Address macros
Diffstat (limited to 'drivers/pci/controller/pci-tegra.c')
-rw-r--r--drivers/pci/controller/pci-tegra.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 8e323e93be915..24478ae5a345d 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -415,13 +415,6 @@ static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset)
* address (access to which generates correct config transaction) falls in
* this 4 KiB region.
*/
-static unsigned int tegra_pcie_conf_offset(u8 bus, unsigned int devfn,
- unsigned int where)
-{
- return ((where & 0xf00) << 16) | (bus << 16) | (PCI_SLOT(devfn) << 11) |
- (PCI_FUNC(devfn) << 8) | (where & 0xff);
-}
-
static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
unsigned int devfn,
int where)
@@ -443,7 +436,9 @@ static void __iomem *tegra_pcie_map_bus(struct pci_bus *bus,
unsigned int offset;
u32 base;
- offset = tegra_pcie_conf_offset(bus->number, devfn, where);
+ offset = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where) &
+ ~PCI_CONF1_ENABLE;
/* move 4 KiB window to offset within the FPCI region */
base = 0xfe100000 + ((offset & ~(SZ_4K - 1)) >> 8);