diff options
| author | Zicheng Qu <quzicheng@huawei.com> | 2024-10-28 14:20:27 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-12-09 10:41:02 +0100 |
| commit | f25a9f1df1f6738acf1fa05595fb6060a2c08ff1 (patch) | |
| tree | 7f6f5e1126ae02f012e3717a745ae7f911984c50 /drivers/pci/controller/dwc/pcie-qcom-common.c | |
| parent | 6d79acba7ad3c9d1b86e85555652b6dc9aee963c (diff) | |
ad7780: fix division by zero in ad7780_write_raw()
commit c174b53e95adf2eece2afc56cd9798374919f99a upstream.
In the ad7780_write_raw() , val2 can be zero, which might lead to a
division by zero error in DIV_ROUND_CLOSEST(). The ad7780_write_raw()
is based on iio_info's write_raw. While val is explicitly declared that
can be zero (in read mode), val2 is not specified to be non-zero.
Fixes: 9085daa4abcc ("staging: iio: ad7780: add gain & filter gpio support")
Cc: stable@vger.kernel.org
Signed-off-by: Zicheng Qu <quzicheng@huawei.com>
Link: https://patch.msgid.link/20241028142027.1032332-1-quzicheng@huawei.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-common.c')
0 files changed, 0 insertions, 0 deletions