diff options
| author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2015-03-31 16:03:21 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-07 10:25:58 +0200 |
| commit | 51ce4db1749028b89a1f4a70bfa78b77df8795e7 (patch) | |
| tree | 9d9cb0f8ccaedc9efed0eee5b8c6761bce93eacd /drivers/gpu/drm/i915/intel_ringbuffer.c | |
| parent | 474d1ec4a3d7775b071e60fdbe431cae37b84ff3 (diff) | |
drm/i915/bdw: WaProgramL3SqcReg1Default
Program the default initial value of the L3SqcReg1 on BDW for performance
v2: Default confirmed and using intel_ring_emit_wa as Mika pointed out.
v3: Spec shows now a different value. It tells us to set to 0x784000
instead the 0x610000 that is there already.
Also rebased after a long time so using WA_WRITE now.
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index a26bdf89e270a..b5af9b121ce1f 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -853,6 +853,9 @@ static int bdw_init_workarounds(struct intel_engine_cs *ring) GEN6_WIZ_HASHING_MASK, GEN6_WIZ_HASHING_16x4); + /* WaProgramL3SqcReg1Default:bdw */ + WA_WRITE(GEN8_L3SQCREG1, BDW_WA_L3SQCREG1_DEFAULT); + return 0; } |