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authorDave Airlie <airlied@redhat.com>2014-03-18 19:06:53 +1000
committerDave Airlie <airlied@redhat.com>2014-03-18 19:06:53 +1000
commit8ad2bc9796994ecba9f4ba2fc9abca27ee9d193d (patch)
treeb36c83fa93da7f18c1331252fb82a87431697443 /drivers/gpu/drm/i915/intel_drv.h
parente40d641099213145a034981e646dc2180a488152 (diff)
parente19b9137142988bec5a76c5f8bdf12a77ea802b0 (diff)
Merge branch 'drm-intel-next' of git://git.freedesktop.org/git/drm-intel into drm-next
- fine-grained display power domains for byt (Imre) - runtime pm prep patches for !hsw from Paulo - WiZ hashing flag updates from Ville - ppgtt setup cleanup and enabling of full 4G range on bdw (Ben) - fixes from Jesse for the inherited intial config code - gpu reset code improvements from Mika - per-pipe num_planes refactoring from Damien - stability fixes around bdw forcewake handling and other bdw w/a from Mika Ken - and as usual a pile of smaller fixes all over * 'drm-intel-next' of git://git.freedesktop.org/git/drm-intel: (107 commits) drm/i915: Go OCD on the Makefile drm/i915: Implement command buffer parsing logic drm/i915: Refactor shmem pread setup drm/i915: Avoid div by zero when pixel clock is large drm/i915: power domains: add vlv power wells drm/i915: factor out intel_set_cpu_fifo_underrun_reporting_nolock drm/i915: vlv: factor out valleyview_display_irq_install drm/i915: sanity check power well sw state against hw state drm/i915: factor out reset_vblank_counter drm/i915: sanitize PUNIT register macro definitions drm/i915: vlv: keep first level vblank IRQs masked drm/i915: check pipe power domain when reading its hw state drm/i915: check port power domain when reading the encoder hw state drm/i915: get port power domain in connector detect handlers drm/i915: add port power domains drm/i915: add noop power well handlers instead of NULL checking them drm/i915: split power well 'set' handler to separate enable/disable/sync_hw drm/i915: add init power domain to always-on power wells drm/i915: move power domain macros to intel_pm.c drm/i915: Disable full ppgtt by default ...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h21
1 files changed, 12 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a4ffc021c317..9c7090590776 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -609,6 +609,8 @@ hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
/* i915_irq.c */
bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
enum pipe pipe, bool enable);
+bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
+ enum pipe pipe, bool enable);
bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
enum transcoder pch_transcoder,
bool enable);
@@ -732,7 +734,9 @@ ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
bool intel_crtc_active(struct drm_crtc *crtc);
void hsw_enable_ips(struct intel_crtc *crtc);
void hsw_disable_ips(struct intel_crtc *crtc);
-void intel_display_set_init_power(struct drm_device *dev, bool enable);
+void intel_display_set_init_power(struct drm_i915_private *dev, bool enable);
+enum intel_display_power_domain
+intel_display_port_power_domain(struct intel_encoder *intel_encoder);
int valleyview_get_vco(struct drm_i915_private *dev_priv);
void intel_mode_from_pipe_config(struct drm_display_mode *mode,
struct intel_crtc_config *pipe_config);
@@ -871,18 +875,17 @@ bool intel_fbc_enabled(struct drm_device *dev);
void intel_update_fbc(struct drm_device *dev);
void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
void intel_gpu_ips_teardown(void);
-int intel_power_domains_init(struct drm_device *dev);
-void intel_power_domains_remove(struct drm_device *dev);
-bool intel_display_power_enabled(struct drm_device *dev,
+int intel_power_domains_init(struct drm_i915_private *);
+void intel_power_domains_remove(struct drm_i915_private *);
+bool intel_display_power_enabled(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
-bool intel_display_power_enabled_sw(struct drm_device *dev,
+bool intel_display_power_enabled_sw(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
-void intel_display_power_get(struct drm_device *dev,
+void intel_display_power_get(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
-void intel_display_power_put(struct drm_device *dev,
+void intel_display_power_put(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
-void intel_power_domains_init_hw(struct drm_device *dev);
-void intel_set_power_well(struct drm_device *dev, bool enable);
+void intel_power_domains_init_hw(struct drm_i915_private *dev_priv);
void intel_enable_gt_powersave(struct drm_device *dev);
void intel_disable_gt_powersave(struct drm_device *dev);
void ironlake_teardown_rc6(struct drm_device *dev);