summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
diff options
context:
space:
mode:
authorDave Airlie <airlied@redhat.com>2024-05-10 08:34:14 +1000
committerDave Airlie <airlied@redhat.com>2024-05-10 08:34:50 +1000
commitb356ead840a6a1a2fb0ab0620d8b97f09d6de0cc (patch)
tree60f0465e90e69a593ec7af1b7b0cccfa6f637d74 /drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
parentdd5a440a31fae6e459c0d6271dddd62825505361 (diff)
parent43b26bdd2ee5cfca80939be910d5b23a50cd7f9d (diff)
Merge tag 'drm-intel-fixes-2024-05-08' of https://anongit.freedesktop.org/git/drm/drm-intel into drm-fixes
- Automate CCS Mode setting during engine resets (Andi) - Fix audio time stamp programming for DP (Chaitanya) - Fix parsing backlight BDB data (Karthikeyan) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZjvTVEmQeVKVB2jx@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
index 044219c5960a..99b71bb7da0a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
@@ -8,14 +8,14 @@
#include "intel_gt_ccs_mode.h"
#include "intel_gt_regs.h"
-void intel_gt_apply_ccs_mode(struct intel_gt *gt)
+unsigned int intel_gt_apply_ccs_mode(struct intel_gt *gt)
{
int cslice;
u32 mode = 0;
int first_ccs = __ffs(CCS_MASK(gt));
if (!IS_DG2(gt->i915))
- return;
+ return 0;
/* Build the value for the fixed CCS load balancing */
for (cslice = 0; cslice < I915_MAX_CCS; cslice++) {
@@ -35,5 +35,5 @@ void intel_gt_apply_ccs_mode(struct intel_gt *gt)
XEHP_CCS_MODE_CSLICE_MASK);
}
- intel_uncore_write(gt->uncore, XEHP_CCS_MODE, mode);
+ return mode;
}