diff options
author | Thomas Zimmermann <tzimmermann@suse.de> | 2025-04-07 13:47:40 +0200 |
---|---|---|
committer | Thomas Zimmermann <tzimmermann@suse.de> | 2025-04-07 14:35:48 +0200 |
commit | 1afba39f9305fe4061a4e70baa6ebab9d41459da (patch) | |
tree | 67e7ed686bd75adc559025870151c4de6d649ced /drivers/gpu/drm/i915/display/intel_display_irq.h | |
parent | fbe43810d563a293e3de301141d33caf1f5d5c5a (diff) | |
parent | 0af2f6be1b4281385b618cb86ad946eded089ac8 (diff) |
Merge drm/drm-next into drm-misc-next
Backmerging to get v6.15-rc1 into drm-misc-next. Also fixes a
build issue when enabling CONFIG_DRM_SCHED_KUNIT_TEST.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display_irq.h')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_display_irq.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h index b077712b7be1..d9867cd0a220 100644 --- a/drivers/gpu/drm/i915/display/intel_display_irq.h +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h @@ -11,8 +11,9 @@ #include "intel_display_limits.h" enum pipe; -struct drm_i915_private; struct drm_crtc; +struct drm_i915_private; +struct intel_display; void valleyview_enable_display_irqs(struct drm_i915_private *i915); void valleyview_disable_display_irqs(struct drm_i915_private *i915); @@ -64,7 +65,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *i915); void gen11_de_irq_postinstall(struct drm_i915_private *i915); void dg1_de_irq_postinstall(struct drm_i915_private *i915); -u32 i915_pipestat_enable_mask(struct drm_i915_private *i915, enum pipe pipe); +u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe); void i915_enable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask); void i915_disable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask); void i915_enable_asle_pipestat(struct drm_i915_private *i915); @@ -75,6 +76,9 @@ void i915_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_ void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]); void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32 pipe_stats[I915_MAX_PIPES]); +void vlv_display_error_irq_ack(struct intel_display *display, u32 *eir, u32 *dpinvgtt); +void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt); + void intel_display_irq_init(struct drm_i915_private *i915); void i915gm_irq_cstate_wa(struct drm_i915_private *i915, bool enable); |