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authorVille Syrjälä <ville.syrjala@linux.intel.com>2025-02-06 20:55:27 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2025-02-10 23:02:35 +0200
commit5dcfda5cfa42616ca84c41aa090e17e7417a0f68 (patch)
tree525f0f5ea42a1b7915c3bd4fc064ac5d0338d02e /drivers/gpu/drm/i915/display/intel_display_irq.c
parente3da9834e4728fb4ed4d87f5892e78d47498f2e3 (diff)
drm/i915: Convert intel_display_power_{get,put}*() to intel_display
Pass intel_display to the display power stuff. These are spread all over the place so tend to hinder clean conversions of whole files. TODO: The gt part/unpark power domain shenanigans need some kind of more abstract interface... v2: Deal with cmtg Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250206185533.32306-7-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display_irq.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_display_irq.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index d9734fcd0d45..0f68b0a34ca9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1617,7 +1617,7 @@ void gen8_display_irq_reset(struct drm_i915_private *dev_priv)
intel_de_write(display, EDP_PSR_IIR, 0xffffffff);
for_each_pipe(dev_priv, pipe)
- if (intel_display_power_is_enabled(dev_priv,
+ if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
@@ -1644,7 +1644,7 @@ void gen11_display_irq_reset(struct drm_i915_private *dev_priv)
enum intel_display_power_domain domain;
domain = POWER_DOMAIN_TRANSCODER(trans);
- if (!intel_display_power_is_enabled(dev_priv, domain))
+ if (!intel_display_power_is_enabled(display, domain))
continue;
intel_de_write(display,
@@ -1660,7 +1660,7 @@ void gen11_display_irq_reset(struct drm_i915_private *dev_priv)
}
for_each_pipe(dev_priv, pipe)
- if (intel_display_power_is_enabled(dev_priv,
+ if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
@@ -1887,7 +1887,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
enum intel_display_power_domain domain;
domain = POWER_DOMAIN_TRANSCODER(trans);
- if (!intel_display_power_is_enabled(dev_priv, domain))
+ if (!intel_display_power_is_enabled(display, domain))
continue;
intel_display_irq_regs_assert_irr_is_zero(display,
@@ -1900,7 +1900,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
for_each_pipe(dev_priv, pipe) {
dev_priv->display.irq.de_irq_mask[pipe] = ~de_pipe_masked;
- if (intel_display_power_is_enabled(dev_priv,
+ if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
dev_priv->display.irq.de_irq_mask[pipe],