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| author | Paolo Bonzini <pbonzini@redhat.com> | 2019-08-09 16:53:39 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-08-09 16:53:39 +0200 |
| commit | 0e1c438c44dd9cde56effb44c5f1cfeda72e108d (patch) | |
| tree | fa3492d4d7d8b7444e5d8ebe6c78210826333e4b /drivers/gpu/drm/amd/include/amd_shared.h | |
| parent | c096397c78f766db972f923433031f2dec01cae0 (diff) | |
| parent | cdb2d3ee0436d74fa9092f2df46aaa6f9e03c969 (diff) | |
Merge tag 'kvmarm-fixes-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm fixes for 5.3
- A bunch of switch/case fall-through annotation, fixing one actual bug
- Fix PMU reset bug
- Add missing exception class debug strings
Diffstat (limited to 'drivers/gpu/drm/amd/include/amd_shared.h')
| -rw-r--r-- | drivers/gpu/drm/amd/include/amd_shared.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index 574bf6e707636..a0a7211438f22 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h @@ -26,7 +26,7 @@ #include <drm/amd_asic_type.h> -#define AMD_MAX_USEC_TIMEOUT 200000 /* 200 ms */ +#define AMD_MAX_USEC_TIMEOUT 1000000 /* 1000 ms */ /* * Chip flags @@ -52,7 +52,8 @@ enum amd_ip_block_type { AMD_IP_BLOCK_TYPE_UVD, AMD_IP_BLOCK_TYPE_VCE, AMD_IP_BLOCK_TYPE_ACP, - AMD_IP_BLOCK_TYPE_VCN + AMD_IP_BLOCK_TYPE_VCN, + AMD_IP_BLOCK_TYPE_MES }; enum amd_clockgating_state { @@ -93,6 +94,11 @@ enum amd_powergating_state { #define AMD_CG_SUPPORT_DRM_MGCG (1 << 22) #define AMD_CG_SUPPORT_DF_MGCG (1 << 23) #define AMD_CG_SUPPORT_VCN_MGCG (1 << 24) +#define AMD_CG_SUPPORT_HDP_DS (1 << 25) +#define AMD_CG_SUPPORT_HDP_SD (1 << 26) +#define AMD_CG_SUPPORT_IH_CG (1 << 27) +#define AMD_CG_SUPPORT_ATHUB_LS (1 << 28) +#define AMD_CG_SUPPORT_ATHUB_MGCG (1 << 29) /* PG flags */ #define AMD_PG_SUPPORT_GFX_PG (1 << 0) #define AMD_PG_SUPPORT_GFX_SMG (1 << 1) @@ -109,7 +115,8 @@ enum amd_powergating_state { #define AMD_PG_SUPPORT_GFX_PIPELINE (1 << 12) #define AMD_PG_SUPPORT_MMHUB (1 << 13) #define AMD_PG_SUPPORT_VCN (1 << 14) -#define AMD_PG_SUPPORT_VCN_DPG (1 << 15) +#define AMD_PG_SUPPORT_VCN_DPG (1 << 15) +#define AMD_PG_SUPPORT_ATHUB (1 << 16) enum PP_FEATURE_MASK { PP_SCLK_DPM_MASK = 0x1, |