diff options
| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2025-07-28 10:24:40 +0200 |
|---|---|---|
| committer | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2025-07-28 10:24:40 +0200 |
| commit | f61389a9cd26b424485acade726ccfff96c749de (patch) | |
| tree | f54ed90124becd0e3758ef0702ae5866c6bfa65c /drivers/gpu/drm/amd/display/modules/freesync/freesync.c | |
| parent | c3ff7f06c7876bc292cac1c7d4df3d0bfd74f3b7 (diff) | |
| parent | 85b9dd6e90b92f5cb7c47991421ceb4925ba2a87 (diff) | |
Merge tag 'i2c-host-6.17-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow
i2c-host for v6.17, part 1
Cleanups and refactorings:
- lpi2c, riic, st, stm32f7: general improvements
- riic: support more flexible IRQ configurations
- tegra: fix documentation
Improvements:
- lpi2c: improve register polling and add atomic transfer
- imx: use guarded spinlocks
New hardware support:
- Samsung Exynos 2200
- Renesas RZ/T2H (R9A09G077), RZ/N2H (R9A09G087)
DT binding:
- rk3x: enable power domains
- nxp: support clock property
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync/freesync.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c index 3ba9b62ba70b8..250f09922d2fa 100644 --- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c +++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c @@ -155,6 +155,14 @@ unsigned int mod_freesync_calc_v_total_from_refresh( v_total = div64_u64(div64_u64(((unsigned long long)( frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)), stream->timing.h_total), 1000000); + } else if (refresh_in_uhz >= stream->timing.max_refresh_in_uhz) { + /* When the target refresh rate is the maximum panel refresh rate + * round up the vtotal value to prevent off-by-one error causing + * v_total_min to be below the panel's lower bound + */ + v_total = div64_u64(div64_u64(((unsigned long long)( + frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)), + stream->timing.h_total) + (1000000 - 1), 1000000); } else { v_total = div64_u64(div64_u64(((unsigned long long)( frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)), |