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| author | Dillon Varone <dillon.varone@amd.com> | 2025-01-14 12:14:26 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-02-12 21:02:59 -0500 |
| commit | cbd97d621ece1d92c3542e52f8af7c04cd2c6afb (patch) | |
| tree | 0a817d41aec02950b00a7f25fd71eed936f178b5 /drivers/gpu/drm/amd/display/dmub/src | |
| parent | c31b41f1cb32450d8ac176eef9bda979760040e7 (diff) | |
drm/amd/display: Ammend DCPG IP control sequences to align with HW guidance
[WHY&HOW]
IP_REQUEST_CNTL should only be toggled off when it was originally, never
unconditionally.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/src')
0 files changed, 0 insertions, 0 deletions