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authorGraham Sider <Graham.Sider@amd.com>2023-01-05 10:58:07 -0500
committerAlex Deucher <alexander.deucher@amd.com>2023-06-09 09:51:40 -0400
commitd839a158b2480814bc438f9f46f440a7b9f63cb6 (patch)
treee63015a5fab9feae53b96fcae2638067ee3a62a9 /drivers/gpu/drm/amd/amdgpu
parent30b52995c294b3c9a002ff2f90f773cbf8850714 (diff)
drm/amdgpu: Correct dGPU MTYPE settings for gfx943
Revert temporary dGPU VRAM MTYPE setting and align with expected coherency protocol. Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c15
1 files changed, 5 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index aca8489635b8f..b6c500be6f703 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1238,17 +1238,12 @@ static void gmc_v9_0_get_coherence_flags(struct amdgpu_device *adev,
mtype = MTYPE_RW;
} else {
/* dGPU */
- /*
- if ((mem->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) &&
- bo_adev == adev)
- mapping_flags |= AMDGPU_VM_MTYPE_RW;
+ if (is_vram && bo_adev == adev)
+ mtype = MTYPE_RW;
+ else if (is_vram)
+ mtype = MTYPE_NC;
else
- */
- /* Temporarily comment out above lines and use MTYPE_NC
- * on both VRAM and system memory access until
- * MTYPE_RW can properly work on VRAM access
- */
- mtype = MTYPE_NC;
+ mtype = MTYPE_UC;
}
break;