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authorMark Brown <broonie@kernel.org>2020-12-28 14:20:00 +0000
committerMark Brown <broonie@kernel.org>2020-12-28 14:20:00 +0000
commit2ae6f64ce1ce304b502461fdfe0b96c8171ae2cc (patch)
tree88e987c447daf2c29e2d4c15e58d1029b0cc78c2 /drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
parent3b66e4a8e58a85af3212c7117d7a29c9ef6679a2 (diff)
parent5c8fe583cce542aa0b84adc939ce85293de36e5e (diff)
Merge tag 'v5.11-rc1' into regulator-5.11
Linux 5.11-rc1
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index f84701c562bf2..d7b39c07de205 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -344,7 +344,7 @@ static void mmhub_v1_0_gart_disable(struct amdgpu_device *adev)
u32 i;
/* Disable all tables */
- for (i = 0; i < 16; i++)
+ for (i = 0; i < AMDGPU_NUM_VMID; i++)
WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_CNTL,
i * hub->ctx_distance, 0);
@@ -409,7 +409,7 @@ static void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, bool
CRASH_ON_NO_RETRY_FAULT, 1);
tmp = REG_SET_FIELD(tmp, VM_L2_PROTECTION_FAULT_CNTL,
CRASH_ON_RETRY_FAULT, 1);
- }
+ }
WREG32_SOC15(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL, tmp);
}
@@ -712,7 +712,7 @@ static int mmhub_v1_0_get_ras_error_count(struct amdgpu_device *adev,
uint32_t sec_cnt, ded_cnt;
for (i = 0; i < ARRAY_SIZE(mmhub_v1_0_ras_fields); i++) {
- if(mmhub_v1_0_ras_fields[i].reg_offset != reg->reg_offset)
+ if (mmhub_v1_0_ras_fields[i].reg_offset != reg->reg_offset)
continue;
sec_cnt = (value &