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authorLinus Torvalds <torvalds@linux-foundation.org>2018-08-30 21:18:05 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2018-08-30 21:18:05 -0700
commit4658aff6eeaaf0b049ce787513abfc985c452e3a (patch)
treeb9005824671f6ba1b5ea412fde270d166969e7e0 /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
parent217c3e0196758662aa0429863b09d1c13da1c5d6 (diff)
parent49a51c4b4064c8a89ffd166434696138edef6b85 (diff)
Merge tag 'drm-fixes-2018-08-31' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie: "Regular fixes pull: - Mediatek has a bunch of fixes to their RDMA and Overlay engines. - i915 has some Cannonlake/Geminilake watermark workarounds, LSPCON fix, HDCP free fix, audio fix and a ppgtt reference counting fix. - amdgpu has some SRIOV, Kasan, memory leaks and other misc fixes" * tag 'drm-fixes-2018-08-31' of git://anongit.freedesktop.org/drm/drm: (35 commits) drm/i915/audio: Hook up component bindings even if displays are disabled drm/i915: Increase LSPCON timeout drm/i915: Stop holding a ref to the ppgtt from each vma drm/i915: Free write_buf that we allocated with kzalloc. drm/i915: Fix glk/cnl display w/a #1175 drm/amdgpu: Need to set moved to true when evict bo drm/amdgpu: Remove duplicated power source update drm/amd/display: Fix memory leak caused by missed dc_sink_release drm/amdgpu: fix holding mn_lock while allocating memory drm/amdgpu: Power on uvd block when hw_fini drm/amdgpu: Update power state at the end of smu hw_init. drm/amdgpu: Fix vce initialize failed on Kaveri/Mullins drm/amdgpu: Enable/disable gfx PG feature in rlc safe mode drm/amdgpu: Adjust the VM size based on system memory size v2 drm/mediatek: fix connection from RDMA2 to DSI1 drm/mediatek: update some variable name from ovl to comp drm/mediatek: use layer_nr function to get layer number to init plane drm/mediatek: add function to return RDMA layer number drm/mediatek: add function to return OVL layer number drm/mediatek: add function to get layer number for component ...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c35
1 files changed, 30 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index ece0ac703e27..b17771dd5ce7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -172,6 +172,7 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base,
* is validated on next vm use to avoid fault.
* */
list_move_tail(&base->vm_status, &vm->evicted);
+ base->moved = true;
}
/**
@@ -369,7 +370,6 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
uint64_t addr;
int r;
- addr = amdgpu_bo_gpu_offset(bo);
entries = amdgpu_bo_size(bo) / 8;
if (pte_support_ats) {
@@ -401,6 +401,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev,
if (r)
goto error;
+ addr = amdgpu_bo_gpu_offset(bo);
if (ats_entries) {
uint64_t ats_value;
@@ -2483,28 +2484,52 @@ static uint32_t amdgpu_vm_get_block_size(uint64_t vm_size)
* amdgpu_vm_adjust_size - adjust vm size, block size and fragment size
*
* @adev: amdgpu_device pointer
- * @vm_size: the default vm size if it's set auto
+ * @min_vm_size: the minimum vm size in GB if it's set auto
* @fragment_size_default: Default PTE fragment size
* @max_level: max VMPT level
* @max_bits: max address space size in bits
*
*/
-void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t vm_size,
+void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size,
uint32_t fragment_size_default, unsigned max_level,
unsigned max_bits)
{
+ unsigned int max_size = 1 << (max_bits - 30);
+ unsigned int vm_size;
uint64_t tmp;
/* adjust vm size first */
if (amdgpu_vm_size != -1) {
- unsigned max_size = 1 << (max_bits - 30);
-
vm_size = amdgpu_vm_size;
if (vm_size > max_size) {
dev_warn(adev->dev, "VM size (%d) too large, max is %u GB\n",
amdgpu_vm_size, max_size);
vm_size = max_size;
}
+ } else {
+ struct sysinfo si;
+ unsigned int phys_ram_gb;
+
+ /* Optimal VM size depends on the amount of physical
+ * RAM available. Underlying requirements and
+ * assumptions:
+ *
+ * - Need to map system memory and VRAM from all GPUs
+ * - VRAM from other GPUs not known here
+ * - Assume VRAM <= system memory
+ * - On GFX8 and older, VM space can be segmented for
+ * different MTYPEs
+ * - Need to allow room for fragmentation, guard pages etc.
+ *
+ * This adds up to a rough guess of system memory x3.
+ * Round up to power of two to maximize the available
+ * VM size with the given page table size.
+ */
+ si_meminfo(&si);
+ phys_ram_gb = ((uint64_t)si.totalram * si.mem_unit +
+ (1 << 30) - 1) >> 30;
+ vm_size = roundup_pow_of_two(
+ min(max(phys_ram_gb * 3, min_vm_size), max_size));
}
adev->vm_manager.max_pfn = (uint64_t)vm_size << 18;