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authorDave Airlie <airlied@redhat.com>2017-02-01 08:39:35 +1000
committerDave Airlie <airlied@redhat.com>2017-02-01 08:39:35 +1000
commit29a73d906bd386839015602c4bd35ef2e3531abc (patch)
treef2d1e92e90e4286d6882f052c9b24f244610f52f /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
parent012bbe28c0e3a479ec7ba6f311710cf8409647d4 (diff)
parent268c3001842cb179b54a2825dad9b70151bf4de6 (diff)
Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next
This is the main feature pull for radeon and amdgpu for 4.11. Highlights: - Power and clockgating improvements - Preliminary SR-IOV support - ttm buffer priority support - ttm eviction fixes - Removal of the ttm lru callbacks - Remove SI DPM quirks due to MC firmware issues - Handle VFCT with multiple vbioses - Powerplay improvements - Lots of driver cleanups * 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (120 commits) drm/amdgpu: fix amdgpu_bo_va_mapping flags drm/amdgpu: access stolen VRAM directly on CZ (v2) drm/amdgpu: access stolen VRAM directly on KV/KB (v2) drm/amdgpu: fix kernel panic when dpm disabled on Kv. drm/amdgpu: fix dpm bug on Kv. drm/amd/powerplay: fix regresstion issue can't set manual dpm mode. drm/amdgpu: handle vfct with multiple vbios images drm/radeon: handle vfct with multiple vbios images drm/amdgpu: move misc si headers into amdgpu drm/amdgpu: remove unused header si_reg.h drm/radeon: drop pitcairn dpm quirks drm/amdgpu: drop pitcairn dpm quirks drm: radeon: radeon_ttm: Handle return NULL error from ioremap_nocache drm/amd/amdgpu/amdgpu_ttm: Handle return NULL error from ioremap_nocache drm/amdgpu: add new virtual display ID drm/amd/amdgpu: remove the uncessary parameter for ib scheduler drm/amdgpu: Bring bo creation in line with radeon driver (v2) drm/amd/powerplay: fix misspelling in header guard drm/ttm: revert "add optional LRU removal callback v2" drm/ttm: revert "implement LRU add callbacks v2" ...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_object.c42
1 files changed, 41 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index bf79b73e1538e..d1aa291b26380 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -363,11 +363,31 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
bo->flags = flags;
+#ifdef CONFIG_X86_32
+ /* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
+ * See https://bugs.freedesktop.org/show_bug.cgi?id=84627
+ */
+ bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
+#elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
+ /* Don't try to enable write-combining when it can't work, or things
+ * may be slow
+ * See https://bugs.freedesktop.org/show_bug.cgi?id=88758
+ */
+
+#warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \
+ thanks to write-combining
+
+ if (bo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
+ DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
+ "better performance thanks to write-combining\n");
+ bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
+#else
/* For architectures that don't support WC memory,
* mask out the WC flag from the BO
*/
if (!drm_arch_can_wc_memory())
bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
+#endif
amdgpu_fill_placement_to_bo(bo, placement);
/* Kernel allocation are uninterruptible */
@@ -386,6 +406,11 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
if (unlikely(r != 0))
return r;
+ bo->tbo.priority = ilog2(bo->tbo.num_pages);
+ if (kernel)
+ bo->tbo.priority *= 2;
+ bo->tbo.priority = min(bo->tbo.priority, (unsigned)(TTM_MAX_BO_PRIORITY - 1));
+
if (flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
struct dma_fence *fence;
@@ -408,7 +433,8 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
return 0;
fail_unreserve:
- ww_mutex_unlock(&bo->tbo.resv->lock);
+ if (!resv)
+ ww_mutex_unlock(&bo->tbo.resv->lock);
amdgpu_bo_unref(&bo);
return r;
}
@@ -472,7 +498,16 @@ int amdgpu_bo_create(struct amdgpu_device *adev,
return r;
if (amdgpu_need_backup(adev) && (flags & AMDGPU_GEM_CREATE_SHADOW)) {
+ if (!resv) {
+ r = ww_mutex_lock(&(*bo_ptr)->tbo.resv->lock, NULL);
+ WARN_ON(r != 0);
+ }
+
r = amdgpu_bo_create_shadow(adev, size, byte_align, (*bo_ptr));
+
+ if (!resv)
+ ww_mutex_unlock(&(*bo_ptr)->tbo.resv->lock);
+
if (r)
amdgpu_bo_unref(bo_ptr);
}
@@ -849,6 +884,7 @@ int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
}
void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
+ bool evict,
struct ttm_mem_reg *new_mem)
{
struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
@@ -861,6 +897,10 @@ void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
abo = container_of(bo, struct amdgpu_bo, tbo);
amdgpu_vm_bo_invalidate(adev, abo);
+ /* remember the eviction */
+ if (evict)
+ atomic64_inc(&adev->num_evictions);
+
/* update statistics */
if (!new_mem)
return;