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authorPavan Chebbi <pavan.chebbi@broadcom.com>2022-07-11 22:26:18 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-07-21 21:24:26 +0200
commit3852f048be6017c89bcd9b5fc69cba540e9bfd75 (patch)
treea5b3eb5be27f8dfa447ccceaf8707620daaf7c43 /drivers/fpga/fpga-mgr.c
parent0260a9aa5d5c33c5a9f62cb41c0587b2efc389ef (diff)
bnxt_en: Fix bnxt_refclk_read()
[ Upstream commit ddde5412fdaa5048bbca31529d46cb8da882870c ] The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around. This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits. Fixes: 30e96f487f64 ("bnxt_en: Do not read the PTP PHC during chip reset") Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
0 files changed, 0 insertions, 0 deletions