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authorThomas Gleixner <tglx@linutronix.de>2017-11-01 00:11:16 +0100
committerThomas Gleixner <tglx@linutronix.de>2017-11-01 00:11:16 +0100
commiteccbf5fbb4dbeece1c611a4897a1b3679510b8bf (patch)
tree0eb0b14c72dddcaa3a7cb1503be41d0339e3981a /drivers/clocksource/mips-gic-timer.c
parentfb56d689fb1c8f13d4d7168abf3838657b042885 (diff)
parentf48729a999ee57b9e831245779e68200dd2bde09 (diff)
Merge branch 'clockevents/4.15' of https://git.linaro.org/people/daniel.lezcano/linux into timers/core
Pull clockevent updates from Daniel Lezcano: - Improve the generic clockevents dependency by factoring out the option in the Kconfig menu option (Arnd Bergmann) - Add missing "\n" in pr_err messages for fttmr010, owl and rockchip (Arvind Yadav) - Add missing timer_of_exit function to rollback timer_of_init (Benjamin Gaignard) - Fix path and add bindings to timers (Daniel Lezcano) - Cleanup and remove support for renesas,cmt-32* (Geert Uytterhoeven) - Add support for separate R-Car Gen2 (Magnus Damm) - Fix DEFINE_PER_CPU length definition to prevent warning at expansion time for the arm_arch_timer (Mark Rutland) - Remove pointless irq_save,restore in an already irq-disabled callback and add a shortcut optimization for the local cpu on mips-gic-timer (Matt Redfearn)
Diffstat (limited to 'drivers/clocksource/mips-gic-timer.c')
-rw-r--r--drivers/clocksource/mips-gic-timer.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index ae3167c28b12..a04808a21d4e 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -39,16 +39,18 @@ static u64 notrace gic_read_count(void)
static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
{
- unsigned long flags;
+ int cpu = cpumask_first(evt->cpumask);
u64 cnt;
int res;
cnt = gic_read_count();
cnt += (u64)delta;
- local_irq_save(flags);
- write_gic_vl_other(mips_cm_vp_id(cpumask_first(evt->cpumask)));
- write_gic_vo_compare(cnt);
- local_irq_restore(flags);
+ if (cpu == raw_smp_processor_id()) {
+ write_gic_vl_compare(cnt);
+ } else {
+ write_gic_vl_other(mips_cm_vp_id(cpu));
+ write_gic_vo_compare(cnt);
+ }
res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
return res;
}