diff options
author | Paolo Bonzini <pbonzini@redhat.com> | 2022-10-22 03:33:58 -0400 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-10-22 03:33:58 -0400 |
commit | 21e6075974c82808fc46ffc72384f2cc8074777f (patch) | |
tree | 4b7a7168d051bd4d18b1ca41b03d2b5f2ba17524 /arch/riscv/kvm/vcpu_timer.c | |
parent | ebccb53e939d9ee211cd304e659498496c2e29c9 (diff) | |
parent | cea8896bd936135559253e9b23340cfa1cdf0caf (diff) |
Merge tag 'kvm-riscv-fixes-6.1-1' of https://github.com/kvm-riscv/linux into HEAD
KVM/riscv fixes for 6.1, take #1
- Fix compilation without RISCV_ISA_ZICBOM
- Fix kvm_riscv_vcpu_timer_pending() for Sstc
Diffstat (limited to 'arch/riscv/kvm/vcpu_timer.c')
-rw-r--r-- | arch/riscv/kvm/vcpu_timer.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/riscv/kvm/vcpu_timer.c b/arch/riscv/kvm/vcpu_timer.c index 185f2386a747..ad34519c8a13 100644 --- a/arch/riscv/kvm/vcpu_timer.c +++ b/arch/riscv/kvm/vcpu_timer.c @@ -320,20 +320,33 @@ void kvm_riscv_vcpu_timer_restore(struct kvm_vcpu *vcpu) kvm_riscv_vcpu_timer_unblocking(vcpu); } -void kvm_riscv_vcpu_timer_save(struct kvm_vcpu *vcpu) +void kvm_riscv_vcpu_timer_sync(struct kvm_vcpu *vcpu) { struct kvm_vcpu_timer *t = &vcpu->arch.timer; if (!t->sstc_enabled) return; - t = &vcpu->arch.timer; #if defined(CONFIG_32BIT) t->next_cycles = csr_read(CSR_VSTIMECMP); t->next_cycles |= (u64)csr_read(CSR_VSTIMECMPH) << 32; #else t->next_cycles = csr_read(CSR_VSTIMECMP); #endif +} + +void kvm_riscv_vcpu_timer_save(struct kvm_vcpu *vcpu) +{ + struct kvm_vcpu_timer *t = &vcpu->arch.timer; + + if (!t->sstc_enabled) + return; + + /* + * The vstimecmp CSRs are saved by kvm_riscv_vcpu_timer_sync() + * upon every VM exit so no need to save here. + */ + /* timer should be enabled for the remaining operations */ if (unlikely(!t->init_done)) return; |