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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-11-27 15:47:52 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-11-27 15:47:52 +0100
commitdc93967b8094b64ea3fd85bf933561d89b6951af (patch)
tree70a3e98b1e1a9ace63900a019e559981fe675dfd /arch/riscv/kernel/cpu.c
parent8341f2f222d729688014ce8306727fdb9798d37e (diff)
parent2e6e902d185027f8e3cb8b7305238f7e35d6a436 (diff)
Merge 4.20-rc4 into tty-next
We need the gsps fixes in here for some other serdev patches we will be merging into this branch. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/riscv/kernel/cpu.c')
-rw-r--r--arch/riscv/kernel/cpu.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 3a5a2ee31547..b4a7d4427fbb 100644
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -64,7 +64,7 @@ int riscv_of_processor_hartid(struct device_node *node)
static void print_isa(struct seq_file *f, const char *orig_isa)
{
- static const char *ext = "mafdc";
+ static const char *ext = "mafdcsu";
const char *isa = orig_isa;
const char *e;
@@ -88,11 +88,14 @@ static void print_isa(struct seq_file *f, const char *orig_isa)
/*
* Check the rest of the ISA string for valid extensions, printing those
* we find. RISC-V ISA strings define an order, so we only print the
- * extension bits when they're in order.
+ * extension bits when they're in order. Hide the supervisor (S)
+ * extension from userspace as it's not accessible from there.
*/
for (e = ext; *e != '\0'; ++e) {
if (isa[0] == e[0]) {
- seq_write(f, isa, 1);
+ if (isa[0] != 's')
+ seq_write(f, isa, 1);
+
isa++;
}
}