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authorClément Léger <cleger@rivosinc.com>2023-11-14 09:12:37 -0500
committerPalmer Dabbelt <palmer@rivosinc.com>2023-12-12 15:44:58 -0800
commite45f463a9b01aabd03c49390fc5249eeba0abc5e (patch)
tree724116440220b55c41c04506069b6977cbe79d53 /arch/riscv/include/asm/hwcap.h
parentb85ea95d086471afb4ad062012a4d73cd328fa86 (diff)
riscv: add ISA extension parsing for Zbc
Zbc was documented in the dt-bindings but actually not supported in ISA string parsing. Add it. Signed-off-by: Clément Léger <cleger@rivosinc.com> Link: https://lore.kernel.org/r/20231114141256.126749-2-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include/asm/hwcap.h')
-rw-r--r--arch/riscv/include/asm/hwcap.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index 06d30526ef3b8..afa9abc1a0b0f 100644
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -57,6 +57,7 @@
#define RISCV_ISA_EXT_ZIHPM 42
#define RISCV_ISA_EXT_SMSTATEEN 43
#define RISCV_ISA_EXT_ZICOND 44
+#define RISCV_ISA_EXT_ZBC 45
#define RISCV_ISA_EXT_MAX 64