diff options
author | Emmanuel Grumbach <emmanuel.grumbach@intel.com> | 2015-12-13 09:41:59 +0200 |
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committer | Emmanuel Grumbach <emmanuel.grumbach@intel.com> | 2015-12-13 09:41:59 +0200 |
commit | 9b18d42dda985c99db4adde45bbdf7cd79a7525c (patch) | |
tree | 78481b44090a9ee19780091ade05a320cbc6a7bb /arch/mips/xilfpga/time.c | |
parent | 39bdb17ebb5bd7a5c8a231d7cac4a4d5ccc58149 (diff) | |
parent | 1b894521e60c1b91db1e8ba1278660e5c89f1b5f (diff) |
Merge tag 'mac80211-next-for-davem-2015-12-07' into next
This pull request got a bit bigger than I wanted, due to
needing to reshuffle and fix some bugs. I merged mac80211
to get the right base for some of these changes.
* new mac80211 API for upcoming driver changes: EOSP handling,
key iteration
* scan abort changes allowing to cancel an ongoing scan
* VHT IBSS 80+80 MHz support
* re-enable full AP client state tracking after fixes
* various small fixes (that weren't relevant for mac80211)
* various cleanups
Diffstat (limited to 'arch/mips/xilfpga/time.c')
-rw-r--r-- | arch/mips/xilfpga/time.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/mips/xilfpga/time.c b/arch/mips/xilfpga/time.c new file mode 100644 index 0000000000000..cbb3fca7b6fa3 --- /dev/null +++ b/arch/mips/xilfpga/time.c @@ -0,0 +1,41 @@ +/* + * Xilfpga clocksource/timer setup + * + * Copyright (C) 2015 Imagination Technologies + * Author: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + */ + +#include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/clocksource.h> +#include <linux/of.h> + +#include <asm/time.h> + +void __init plat_time_init(void) +{ + struct device_node *np; + struct clk *clk; + + of_clk_init(NULL); + clocksource_probe(); + + np = of_get_cpu_node(0, NULL); + if (!np) { + pr_err("Failed to get CPU node\n"); + return; + } + + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) { + pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk)); + return; + } + + mips_hpt_frequency = clk_get_rate(clk) / 2; + clk_put(clk); +} |