Merge tag 'mips_6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer:

 - added support for Huawei B593u-12

 - added support for virt board aligned to QEMU MIPS virt board

 - added support for doing DMA coherence on a per device base

 - reworked handling of RALINK SoCs

 - cleanup for Loongon64 barriers

 - removed deprecated support for MIPS_CMP SMP handling method

 - removed support Sibyte CARMEL and CHRINE boards

 - cleanups and fixes

* tag 'mips_6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (59 commits)
  MIPS: uprobes: Restore thread.trap_nr
  MIPS: Don't clear _PAGE_SPECIAL in _PAGE_CHG_MASK
  MIPS: Sink body of check_bugs_early() into its only call site
  MIPS: Mark check_bugs() as __init
  Revert "MIPS: generic: Enable all CPUs supported by virt board in Kconfig"
  MIPS: octeon_switch: Remove duplicated labels
  MIPS: loongson2ef: Add missing break in cs5536_isa
  MIPS: Remove set_swbp() in uprobes.c
  MIPS: Use def_bool y for ARCH_SUPPORTS_UPROBES
  MIPS: fw: Allow firmware to pass a empty env
  MIPS: Remove deprecated CONFIG_MIPS_CMP
  MIPS: lantiq: remove unused function declaration
  MIPS: Drop unused positional parameter in local_irq_{dis,en}able
  MIPS: mm: Remove local_cache_flush_page
  MIPS: Remove no longer used ide.h
  MIPS: mm: Remove unused *cache_page_indexed flush functions
  MIPS: generic: Enable all CPUs supported by virt board in Kconfig
  MIPS: Add board config for virt board
  MIPS: Octeon: Disable CVMSEG by default on other platforms
  MIPS: Loongson: Don't select platform features with CPU
  ...

1 files changed, 6 insertions, 1 deletions

diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index 3fde1ff72bd16..ae2cd37a38f05 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -202,11 +202,13 @@ struct octeon_cop2_state {
 #define COP2_INIT						\
 	.cp2			= {0,},
 
+#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \
+	CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
 struct octeon_cvmseg_state {
 	unsigned long cvmseg[CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE]
 			    [cpu_dcache_line_size() / sizeof(unsigned long)];
 };
-
+#endif
 #else
 #define COP2_INIT
 #endif
@@ -263,8 +265,11 @@ struct thread_struct {
 	unsigned long trap_nr;
 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 	struct octeon_cop2_state cp2 __attribute__ ((__aligned__(128)));
+#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \
+	CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
 	struct octeon_cvmseg_state cvmseg __attribute__ ((__aligned__(128)));
 #endif
+#endif
 	struct mips_abi *abi;
 };