diff options
| author | Manuel Lauss <manuel.lauss@gmail.com> | 2014-07-23 16:36:24 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 13:53:28 +0200 |
| commit | 1d09de7dc76ef96a9a2c7c0244e20f12d68e6ef8 (patch) | |
| tree | 929cb54b63224fc65d7b56d52b00a89bb236b9a0 /arch/mips/alchemy/common/clocks.c | |
| parent | 2ef1bb99116e49226e8bab8ebab255f12fa8a99e (diff) | |
MIPS: Alchemy: introduce helpers to access SYS register block.
This patch changes all absolute SYS_XY registers to offsets from the
SYS block base, prefixes them with AU1000 to avoid silent failures due
to changed addresses, and introduces helper functions to read/write
them.
No functional changes, comparing assembly of a few select functions shows
no differences.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7464/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/common/clocks.c')
| -rw-r--r-- | arch/mips/alchemy/common/clocks.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/alchemy/common/clocks.c b/arch/mips/alchemy/common/clocks.c index f38298a8b98c..0e41416fa682 100644 --- a/arch/mips/alchemy/common/clocks.c +++ b/arch/mips/alchemy/common/clocks.c @@ -91,13 +91,13 @@ unsigned long au1xxx_calc_clock(void) if (au1xxx_cpu_has_pll_wo()) cpu_speed = 396000000; else - cpu_speed = (au_readl(SYS_CPUPLL) & 0x0000003f) * AU1000_SRC_CLK; + cpu_speed = (alchemy_rdsys(AU1000_SYS_CPUPLL) & 0x3f) * AU1000_SRC_CLK; /* On Alchemy CPU:counter ratio is 1:1 */ mips_hpt_frequency = cpu_speed; /* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */ - set_au1x00_uart_baud_base(cpu_speed / (2 * ((int)(au_readl(SYS_POWERCTRL) - & 0x03) + 2) * 16)); + set_au1x00_uart_baud_base(cpu_speed / (2 * + ((alchemy_rdsys(AU1000_SYS_POWERCTRL) & 0x03) + 2) * 16)); set_au1x00_speed(cpu_speed); |