diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2016-07-04 12:26:05 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-07-04 12:26:05 +0200 |
| commit | 8658be133baa92c06b6d832a436d437deb2e2a22 (patch) | |
| tree | 8f798f4aae5892533831487e4838a85b95414a0f /arch/arc/include/asm/pgtable.h | |
| parent | 4030103b9b2e060512f8292bb62582adfd02ebe8 (diff) | |
| parent | 5e385a6ef31fbbf2acbda770aecc2bc2ff933d17 (diff) | |
Merge branch 'irq/for-block' into irq/core
Pull the irq affinity managing code which is in a seperate branch for block
developers to pull.
Diffstat (limited to 'arch/arc/include/asm/pgtable.h')
| -rw-r--r-- | arch/arc/include/asm/pgtable.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index 034bbdc0ff61c..858f98ef7f1ba 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h @@ -47,7 +47,7 @@ * Page Tables are purely for Linux VM's consumption and the bits below are * suited to that (uniqueness). Hence some are not implemented in the TLB and * some have different value in TLB. - * e.g. MMU v2: K_READ bit is 8 and so is GLOBAL (possible becoz they live in + * e.g. MMU v2: K_READ bit is 8 and so is GLOBAL (possible because they live in * seperate PD0 and PD1, which combined forms a translation entry) * while for PTE perspective, they are 8 and 9 respectively * with MMU v3: Most bits (except SHARED) represent the exact hardware pos |