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authorLeon Romanovsky <leon@kernel.org>2025-06-25 03:57:23 -0400
committerLeon Romanovsky <leon@kernel.org>2025-06-25 03:57:23 -0400
commit4aa765af7983d51eafa13d76398045a5e687b73d (patch)
treea3da8fece8eb8caf6143bb160f2ec3ce8019f219 /arch/arc/include/asm/pgtable-bits-arcv2.h
parentb5eeb8365d196c95dbb0fd0a5b5a69a44832f16f (diff)
parent52931f55159ea5c27ad4fe66fc0cb8ad75ab795b (diff)
Add multiple priorities support to mlx5 RDMA TRANSPORT tables
From Patrisious: This short series from Patrisious extends mlx5 flow steering logic to allow creation rule creation with priorities in RDMA TRANSPORT tables. Thanks Link: https://lore.kernel.org/all/cover.1750148083.git.leon@kernel.org Signed-off-by: Leon Romanovsky <leon@kernel.org> * mlx5-next: (200 commits) net/mlx5: fs, add multiple prios to RDMA TRANSPORT steering domain Linux 6.16-rc2 ...
Diffstat (limited to 'arch/arc/include/asm/pgtable-bits-arcv2.h')
-rw-r--r--arch/arc/include/asm/pgtable-bits-arcv2.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arc/include/asm/pgtable-bits-arcv2.h b/arch/arc/include/asm/pgtable-bits-arcv2.h
index 8ebec1b21d24..4630c5acca05 100644
--- a/arch/arc/include/asm/pgtable-bits-arcv2.h
+++ b/arch/arc/include/asm/pgtable-bits-arcv2.h
@@ -75,7 +75,7 @@
* This is to enable COW mechanism
*/
/* xwr */
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#define pte_write(pte) (pte_val(pte) & _PAGE_WRITE)
#define pte_dirty(pte) (pte_val(pte) & _PAGE_DIRTY)
@@ -130,7 +130,7 @@ void update_mmu_cache_range(struct vm_fault *vmf, struct vm_area_struct *vma,
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
-static inline int pte_swp_exclusive(pte_t pte)
+static inline bool pte_swp_exclusive(pte_t pte)
{
return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
}
@@ -142,6 +142,6 @@ PTE_BIT_FUNC(swp_clear_exclusive, &= ~(_PAGE_SWP_EXCLUSIVE));
#include <asm/hugepage.h>
#endif
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif