diff options
author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2025-03-29 20:07:11 +0100 |
---|---|---|
committer | Vinod Koul <vkoul@kernel.org> | 2025-04-10 19:17:26 +0530 |
commit | ff02c5a3df4852819d9ec218e5c8ae48eb02b101 (patch) | |
tree | 451d5321a9a9c88d9035a492ad3d58510f5f0ec0 | |
parent | 588d5d20ca8defa5ba5d1b536ff3695f6ab7aa87 (diff) |
phy: amlogic: meson8b-usb2: Use FIELD_PREP instead of _SHIFT macros
This simplifies the code by re-using the FIELD_PREP helper. No
functional changes inteded.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20250329190712.858349-2-martin.blumenstingl@googlemail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
-rw-r--r-- | drivers/phy/amlogic/phy-meson8b-usb2.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/phy/amlogic/phy-meson8b-usb2.c b/drivers/phy/amlogic/phy-meson8b-usb2.c index d63147c41b8c..d9c761b7c15c 100644 --- a/drivers/phy/amlogic/phy-meson8b-usb2.c +++ b/drivers/phy/amlogic/phy-meson8b-usb2.c @@ -5,6 +5,7 @@ * Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com> */ +#include <linux/bitfield.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/io.h> @@ -39,9 +40,7 @@ #define REG_CTRL_TX_BITSTUFF_ENN BIT(18) #define REG_CTRL_COMMON_ON BIT(19) #define REG_CTRL_REF_CLK_SEL_MASK GENMASK(21, 20) - #define REG_CTRL_REF_CLK_SEL_SHIFT 20 #define REG_CTRL_FSEL_MASK GENMASK(24, 22) - #define REG_CTRL_FSEL_SHIFT 22 #define REG_CTRL_PORT_RESET BIT(25) #define REG_CTRL_THREAD_ID_MASK GENMASK(31, 26) @@ -170,10 +169,10 @@ static int phy_meson8b_usb2_power_on(struct phy *phy) REG_CONFIG_CLK_32k_ALTSEL); regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK, - 0x2 << REG_CTRL_REF_CLK_SEL_SHIFT); + FIELD_PREP(REG_CTRL_REF_CLK_SEL_MASK, 0x2)); regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK, - 0x5 << REG_CTRL_FSEL_SHIFT); + FIELD_PREP(REG_CTRL_FSEL_MASK, 0x5)); /* reset the PHY */ regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET, |