diff options
| author | Ryan Wanner <Ryan.Wanner@microchip.com> | 2025-02-27 08:52:02 -0700 |
|---|---|---|
| committer | Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2025-03-02 17:41:52 +0200 |
| commit | f4573d25c14d1ccd7401bc5fcd56eb76811df418 (patch) | |
| tree | 6b9ee0bc7beee57e218bdf10ed13590f6660842f | |
| parent | 510a6190cf5ee9481a8565a4d9935e1d1f1f8f05 (diff) | |
ARM: dts: microchip: sama7d65: Add Reset Controller to sama7d65 SoC
Add Reset Controller support to SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/a9620ff11456a1ddfb9c289421606602193ce5b6.1740671156.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
| -rw-r--r-- | arch/arm/boot/dts/microchip/sama7d65.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 92a5347e35b5..b614747374bd 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -77,6 +77,13 @@ clock-names = "td_slck", "md_slck", "main_xtal"; }; + reset_controller: reset-controller@e001d100 { + compatible = "microchip,sama7d65-rstc", "microchip,sama7g5-rstc"; + reg = <0xe001d100 0xc>, <0xe001d1e4 0x4>; + #reset-cells = <1>; + clocks = <&clk32k 0>; + }; + clk32k: clock-controller@e001d500 { compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc"; reg = <0xe001d500 0x4>; |