diff options
| author | Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2024-04-18 11:15:11 -0600 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-04-30 09:52:15 -0400 |
| commit | f1bf3bc6cb932b2094c71d5b45cf4e56b8450852 (patch) | |
| tree | 2c14e363dc9b867feeb89c916b91421c4a1b011f | |
| parent | 6b042da49c45aab31638e22672ac2af91eb6a08d (diff) | |
drm/amd/display: Adjust codestyle for dcn31 and hdcp_msg
This commit just update the code style in two if conditions and in an
static array.
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c index 59a9023132000..4407640c5f872 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c @@ -645,9 +645,9 @@ void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params dcn3_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; s[i].phyclk_mhz = dcn3_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz; } - if (clk_table->num_entries) { + + if (clk_table->num_entries) dcn3_1_soc.num_states = clk_table->num_entries; - } memcpy(dcn3_1_soc.clock_limits, s, sizeof(dcn3_1_soc.clock_limits)); @@ -797,9 +797,9 @@ void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_param dcn3_16_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; s[i].phyclk_mhz = dcn3_16_soc.clock_limits[closest_clk_lvl].phyclk_mhz; } - if (clk_table->num_entries) { + + if (clk_table->num_entries) dcn3_16_soc.num_states = clk_table->num_entries; - } memcpy(dcn3_16_soc.clock_limits, s, sizeof(dcn3_16_soc.clock_limits)); diff --git a/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c b/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c index 99e17c164ce7b..076a829c23783 100644 --- a/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c +++ b/drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c @@ -70,7 +70,7 @@ static const bool hdcp_cmd_is_read[HDCP_MESSAGE_ID_MAX] = { [HDCP_MESSAGE_ID_WRITE_REPEATER_AUTH_STREAM_MANAGE] = false, [HDCP_MESSAGE_ID_READ_REPEATER_AUTH_STREAM_READY] = true, [HDCP_MESSAGE_ID_READ_RXSTATUS] = true, - [HDCP_MESSAGE_ID_WRITE_CONTENT_STREAM_TYPE] = false + [HDCP_MESSAGE_ID_WRITE_CONTENT_STREAM_TYPE] = false, }; static const uint8_t hdcp_i2c_offsets[HDCP_MESSAGE_ID_MAX] = { |